Master of Science in Electrical Engineering (MSEE)
Electrical and Computer Engineering
In this thesis, I present a design of a small, self-contained, underwater plankton imaging system. I base the imaging system’s design on an embedded PC architecture based on PC/104-Plus standards to meet the compact size and low power requirements. I developed a simple graphical user interface to run on a real-time operating system to control the imaging system. I also address how a real-time image compression scheme implemented on an FPGA chip speeds up image transfer speeds of the imaging system. Since lossless compression of the image is required in order to retain all image details, I began with an established compression scheme like SPIHT, and latter proposed a new compression scheme that suits the imaging system’s requirements. I provide an estimate of the total amount of resources required and propose suitable FPGA chips to implement the compression scheme. Finally, I present various parallel designs by which the FPGA chip can be integrated into the imaging system.
Document Availability at the Time of Submission
Release the entire work immediately for access worldwide.
Tetala Satya Surya, Dattatreya Reddy, "Zooplankton visualization system: design and real-time lossless image compression" (2004). LSU Master's Theses. 529.